Intel明年第二代Xeon D支援 AVX-512指令 - 3C
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By Olivia
at 2017-12-04T11:36
at 2017-12-04T11:36
Table of Contents
Intel日前對外發布了詳細的Benchmark跑分報告,主旨是凸顯自家Xeon Scalable處理器
比AMD EPYC是何等優秀
PPT中,Intel還透露了Xeon D的情況,預計2018年早些時候推出,內建Skylake-SP處理器
架構,FPGA的形式對外出貨
Xeon-D第一代於2015年11月推出,CPU採用Broadwell,最高8核,10G網路支援,熱設計功
耗45W,產品主要用在並行數量要求較高
(去年2月升級到16核)的微機、網路儲存設備、防火牆等領域,所以ARM在這一領域也頗
有作為。
Skylake-SP是目前Intel設計最先進的處理器架構,支援AVX-512指令集。因為AVX-512單
元要占到處理器面積的20%以
所以即便Intel從14nm Broadwell升級為14nm+的Skylake,Anandtech預計這顆SoC的面積仍
然會增加。
來源
http://news.mydrivers.com/1/557/557888.htm
XF編譯
http://www.xfastest.com/thread-202968-1-1.html
XEON 至強 512 一定強
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By Robert
at 2017-12-06T10:43
at 2017-12-06T10:43
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at 2017-12-07T19:03
at 2017-12-07T19:03
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By Jake
at 2017-12-09T23:22
at 2017-12-09T23:22
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