Intel眼中的”假7nm” 台積電這樣說 - 3C
By Selena
at 2020-02-26T00:13
at 2020-02-26T00:13
Table of Contents
採用三星5nm製程的高通驍龍X60基頻已經發表,台積電下半年亦將採用5nm(N5)為蘋果
代工A14、為華為代工Kirin 1020等晶片
顯然,此對於仍在打磨14nm並在10nm供貨能力掙扎的Intel而言似乎並不利。
不過,Intel早於2017年就撰文抨擊行業內關於流程節點命名的混亂,時任製程架構和集
成總監的Mark Bohr
呼籲晶圓廠們建立一套統一的規則來命名先進製程,例如電晶體密度。而若以此項標準來
看的話,Intel的10nm甚至比競品的7nm還要優秀。
後來,坊間的挺Intel派喊出三星、台積電是”假7nm”的話語。
對此,台積電全球行銷負責人-Godfrey Cheng於AMD Webinar活動時回應,自0.35μm(
350nm)開始
所謂的製程數字就不再真正代表物理尺度了。其解釋,7nm(N7)是一種行業標準化術語
而已
之後還有N5等等,而其同樣認為”需要尋求一種全新的、對製程節點不同的描述化語言”
。
若照Intel的建議,以邏輯電晶體密度(MTr/mm2 ,每平方公厘的百萬電晶體數)來作為
定義製程節點的指標
將掃描觸發器和NAND2密度考慮進去,同時報告SRAM單元規模。
來源
https://news.mydrivers.com/1/674/674272.htm
XF編譯
https://news.xfastest.com/others/76995/intel-tsmc-7nm/
一個奈米 各自解讀
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