WD與Toshiba宣布128層3D NAND:單顆512Gb - 3C

By Steve
at 2019-03-08T07:48
at 2019-03-08T07:48
Table of Contents
BiCS4是48+48層堆疊而來,並非一次堆疊96層。
好處是每次堆疊48層是成熟製程,搞定兩次堆疊的對準問題以及相關的流程設計(比方說
第二次蝕刻要怎樣才能不傷害第一次對疊的結構),就會有96層的產品。
BiCS5我認為是64+64而來的128層,目前業界並沒有能一次做到128層的產品,因此toshib
a的BiCS5應該會是最高層數產品。
下一個世代應該是192(96+96),我想這部份可能會是三星先做出來。
另外就是CMOS under ARY (CuA)的技術,讓原本不容易微縮的晶粒面積更進一步的縮小,
也少了很多平坦化(CMP)的難度,最早是在IM 32層(更正)的產品上看到的。這個技術應
該會越來越長聽到。海力士的4D NAND,多出來的1D就是CuA。
--
好處是每次堆疊48層是成熟製程,搞定兩次堆疊的對準問題以及相關的流程設計(比方說
第二次蝕刻要怎樣才能不傷害第一次對疊的結構),就會有96層的產品。
BiCS5我認為是64+64而來的128層,目前業界並沒有能一次做到128層的產品,因此toshib
a的BiCS5應該會是最高層數產品。
下一個世代應該是192(96+96),我想這部份可能會是三星先做出來。
另外就是CMOS under ARY (CuA)的技術,讓原本不容易微縮的晶粒面積更進一步的縮小,
也少了很多平坦化(CMP)的難度,最早是在IM 32層(更正)的產品上看到的。這個技術應
該會越來越長聽到。海力士的4D NAND,多出來的1D就是CuA。
--
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